This invention relates generally to RF and microwave signal amplifiers, and more particularly the invention relates to isolation and bias circuits for use in such amplifiers.
FIG. 1 illustrates a conventional multi-stage RF amplifier including bipolar transistors 10, 12 which arc driven respectively by an input matching network 14 and an interstage matching network 16 with an output impedance matching network 18 at output transistor 12. FETs can be used in the circuit, and additional transistor stages can be provided between transistor 10, 12, but a two-stage amplifier is shown for simplicity. A DC bias voltage is coupled to the base inputs of transistors 10, 12 by bias circuits 20, 22 which are coupled to transistor 10, 12, respectively through choke coils 24, 26. DC power is connected to the bias circuits along with a power down signal applied to pins 28, 30 of the bias circuits.
FIG. 2 is a schematic of bias circuit 20 which includes transistors 32, 34 with power down pin 28 connected through a resistor 36 to the base of transistor 34 and collector transistor 32, and with the DC power pin 30 connected to the collector of transistor 34. The emitter of transistor 32 is grounded, while the base of transistor 32 and emitter of transistor 34 are coupled through choke coil 24 to the base of transistor 10. The RF signal is connected to the base of transistor through pin 38. A capacitor 40 connects coil 24 to ground.
A large RF choke has a high inductance and often a high resistance value. Further, a large capacitance value is often not feasible, especially in MMIC/RFIC circuits where chip area must be minimized. Consequently, the choke may not provide enough insulation of the RF signal from entering the bias circuit and the power supply. Thus, the DC power supply path to the bias circuit can become an RF leakage path and an undesirable RF feedback loop.
The present invention is directed to reducing the undesired RF leakage in a feedback loop through the DC power supply.